When we understand the internal structure of a microprocessor, we will see a diagram similar to 8-bit devices in the 1970s. There will be an ALU, a program counter, a set of registers, and address and data line decoders. Because it is not necessary, most of us will never delve into the nuances of more modern processors. All the processor needs is a black box, unless it particularly arouses your interest or you use bare metal assembly language to work.
We imagine that our simple microprocessor is built with logic gates. In fact, there are many projects on these pages that create usable processors with 74 stacks of chips. However, occasionally there will be a project to remind us that there is more than one way to build a computer, and today's topic is at this moment. [Olivier Bailleux] created his "Gray-1",
, ROM and RAM.
The clever part is accompanied by a description of how to use the ROM to recreate the different functions of the processor through careful programming. Some functions, such as registers, use loops, in which some address lines are driven from data lines to maintain the ROM in a set position. The name of the computer comes from its program counter, which counts in Gray code.
The complete processor implements the RISC architecture, and there is a simulator for code development without physical units. The articles are comprehensive, easy to access, and fascinating.
It is safe to say that this is the only processor we have seen with this novel architectural approach. Although some more conventional previous functions have been tried,
And another
.
The PDP 11 series has a large amount of ROM load on the CPU board, which is used to execute the micro-step processing of the instruction set... easy to understand and very flexible. .These days are a little weird to me, but very hard.
This reminded me of a strange idea... if some kind of very basic processor could be made entirely of power transistors. (More specifically, TO-3 packaging). Is it possible? If so, that would be great... how crazy it would be. I am also curious how much power it needs to run.
I don't understand why this is impossible. But TO-3 is bigger than some of my relays. :-)
This guy made a 6502 out of discrete transistors, although it looks like he used some kind of surface mount.
If you build 6502 in TO-3 (possibly with some blinking LEDs, like the project in the link above), you can put a glass top on it and use it as a dining table. And, of course, if you finally build the 6502 with TO-3 transistors and make it the size of a dining table, then I want to see.
A discrete computer becomes a dining room?
This creates a lot of questions, such as: "Will we eat?" "Until I checked the stopping conditions of this random blinking program"
OTOH can solve the problem of "plate heating" because the food will stay warm :-D
why not?
I am trying to design a discrete computer with Ge transistors,
It may be as slow as the TO3 transistor, but it will take up more space: -D
As for the current: you don't need to run at full power, 5 to 10mA may be sufficient.
There are more links to discrete computers, check out the contributors of the project and check their completely crazy ideas :-D
Power transistors have low gain, huge Miller capacitance, etc. It can be done, but you will not get much performance (e.g. loooow) compared to smaller switching transistors optimized for the job.
If you are building such a processor, it is not for speed!
Check it out-during high school, I helped build one of them:
Wow!
This article is an important resource for my current research on 2TFF
Thanks for sharing!
Well, it is already possible to use SMD transistors to make a working 6502, so I don’t understand why a TO-3 packaged transistor cannot be used:
It makes sense...ROM is the simplest form of programmable logic device, basically a look-up table, which is based on FPGA.
Usually only the "ROM" that constitutes the FPGA lookup table is less than 128 bits.
I was thinking the same thing. Isn't this just building a CPU in an FPGA?
It looks very much like an FPGA implementation with LUT. The most obvious difference is the lack of physical registers. I bet this is a beast approaching the timing!
Considering this more, the number of address lines entering the ROM/RAM chip is not that many. This means that using the FPGA LUT method does not provide many LUTs for each device. The FPGA I use may have 7 or 8 lines in each LUT and only one bit output. This means that 64K ROM/RAM can only provide 2 LUTs. There must be other things here.
At the very least, it at least allows a more detailed understanding of how FPGAs work.
Now we can tell the students that FPGA is just a bunch of ROM and RAM chips, stuffed into a small package: P
Well, this is a beautiful job. I have been running it in simulation for a while, but I have never built it in actual hardware, nor have I dealt with the complexity of the real world.
Mine only uses RAM, so when you turn it off, there will be nothing, no computer, and no data, which is more secure than iPhone. ;-)Yes, you need to stop it and inject it into the state machine, and then make it run, so it is the ultimate product in reconfigurable hardware.
Have you made a SIM card in your computer or FPGA (with RAM LUT)? :-)
This is a component-level sim card, which I call RAMB0. This is to solve the problem of how simple and compact the calculation substrate may be, so machine intelligence may spontaneously appear somewhere in the universe. The memory does not have to be a fixed structure, it just needs to be a mechanism to allow the self-interaction mode to spread over time. This means that the limit drops very small at the subatomic level of the virtual particle pair in the quantum foam, actually very small, even anywhere in the universe, even in obvious empty spaces. From this it is concluded that the entire universe must already be a computer, and may be sensible.
I think this is very interesting, I hope there is a book.
Do you have some schematics and/or documentation of the project? It would be nice to look at it. Thank you for sharing this idea.
Great post, well written! I like to learn more about CPUs, and reading similar content is really helpful. I am a little confused about the Microcode schematics, but this may mean that I need to read it again :).
Reminds me of the old Z80 crack of C80 16-bit output, the BC register is in
Address line and related instructions via data line and appropriate synchronization code
And the processor signal line. That is, look for the instruction and latch the complete 16-bit address line
Only a small amount of dedicated hardware can be used for output.
I built an add-on for the embedded CP/M in the running console in 1982
9172 Joystick in Ford Escort-CPU Non-Maskable Interrupt (NMI) line runs from the distributor
On the surface, the ignition signal is sent to the flamethrower through all the automatic electric fruits of Volkswagen.
Most parts of Bosch... it works in a stylish but not ideal way, this is part of my EE paper-still in the library
Curtin University (formerly WAIT) in Bentley, Western Australia...
The BC register pair is used to drive 8 multiplexed 7-segment LEDs. CPU's NMI line
The Z80 EPROM code space was also switched between CP/M and sampler code. The air flow meter is
The restrictive flap type is not suitable for the Ford escort intake manifold at all, I kept Kabi as a backup...
Use ROM/RAM encoding issues in the table to "determine" the EFI status flag
Machine side. It is an ancient technology and carefully relabeled state and semiconductor timing
Although certainty is simple, the current operating system and some embedded systems
It seems that a more disturbing example of probability has been adopted:/
Also tried ROM/RAM method to recognize ASCII graphic characters
Perform universal adaptive logic circuit (UALC) simulation (DecSystems) on KL-10 running the top 10
However, we have some basic codes that can count the matching data on the image ram to show
The recognition probability asci character pattern is only one of 26 capital letters.
Clumsy and slow user interface, you must type rows/columns to enter the graphics page
But it works great...
iirc
HP uses similar rom/ram decoding in its microword architecture
Sapphire 32-bit micron chips were first adopted around the mid-1980s
Need editing function?
Doh 1972 Ford escorted Mark 1.
1600 progressive carbohydrates with two-way lower draught, the bottom of the manifold is milled to
Remove 4 from the 2L Volkswagen Combination Injector...
Cannot run any floppy disk io while the engine is running, Cp/M command line to check
Peek and wait...
Very interesting and cool project, thank you for writing! Very inspiring for young EE majors!
Very good article, thank you for posting.
I used ROM for logic functions before, but I have never seen anything of this size!
Another project that ostensibly uses ROM instead of logic (for price and convenience considerations): dypled.com
"Remember also that members of the "puritan TTL Nerd score" may laugh at you for using a lookup table of around 1MB."
(C) Dieter Mueller 2004
What is the number of transistors?
Whenever you see a capacitor on a digital line, beware!
Curious readers will notice that the PROM storage on the SD card and its NanoPi and BBB is called NAND storage, which means there is a connection between the PROM and the NAND gate.
Wired connected ROM ("fusible link ROM") can perform any combinational logic function. These are all lookup tables. The input is the address of the output.
Cool project. It's actually great to build it and solve the whole problem. In the past, this was called microcode, and in DEC's years, it will require a dedicated team!
These days, it seems that all USB flash drives have almost the same type
Reliability of 32-bit microprocessor flash memory that records past failures
And the code set looks like a code variant of 8/16-bit 8051
[I know the code can be very complicated and will move around
Due to its own internal scanning (not external
Equipment) to ensure data reliability...]
It should be noted that there are many possible data hackers
Various commissions and opportunities for identity theft, such as:
1. The USB flash memory device reports its 8G when it is actually 32G, so it is allowed
Embedded microcomputer (with the help of drivers running and registered on the surface
Scan and "back up" to the same USB) Scan HD and any connected devices
For any information that looks like a password, personal data (eg resume, bills, transactions)
Data, myob, excel files, such as stock trading data, FP market. XTrade log etc.
2. Hide various DLLs and other system compatible codes in the hidden partition
Even if it does not publicly declare its size as in 1, it can
There are situations that make this "available" to svchosts and other Windows programs
And match the subsequent driver "upgrade" for irrelevant devices.
3. Others, the best, I don’t mention them, but they can be found on high-end hacks (to be told)
forum…
As always, buyers should beware, now its users beware-determinism has become lost!
Someone should design a large USB blocker with larger rom/ram
Space to capture data patterns in the same format as the virus scan we have also used...
Don Lancaster wrote about using ROM to accomplish such tasks in "TTL Cookbook", which is still very useful 42 years after its first publication.
Why do people waste time on such projects? If you want to build/simulate (for example) a microcontroller "core" according to the scale, you only need to use simple programmable logic devices (for example CPLD/FPGA). I will never understand this mentality.
Why can't you understand the concept of "fun games"? I don't know because I like it.
But at least understand that the goal is not efficiency: -D
My efforts have enabled me to learn a lot.
It has nothing to do with the destination, but with the path: -D
I think you are on the wrong website...
Why can people buy puzzles just by buying posters?
Why can people buy imitations, then use their homemade inkjet head to split them into 4 colors and print them, make a CPU from ROM to control it, and then print posters, why do they get puzzles?
Would someone like you waste your time commenting on the anti-hacking motto on the CLEARLY professional hacker website? Have you noticed the URL……hackaday……
You will never understand this mentality, because it is not the mentality of the article at all, it is not at all to build any kind of core; this is about using old ROM/PROM/EPROM (rather than EEPROM) chips for "other than CPU" use.
Maybe the reason for your frustration is that you need more than just a software download to make it sufficient to prove something? Maybe the author deliberately started the whole project to irritate you, because the rest of us like HACKS on HACKaday.
PS: I like the idea of ROM, it is complicated decoder logic, cheap (or cheap) chip (for puns), and can’t work with those who can’t get rid of keyboard and internet connection, enough to connect 30 Line -40 on the breadboard. (No need to track, infect or update)
A few years ago, Harry Lythal SM0VPO also showed outstanding performance when using EPROMS for designer logic:
Is that an FPGA design built as a circuit board?
FPGA has a register after each lookup table. No ROM, which is a bit tricky.
The big question when starting to use this method is: how to use ROM to add "instant" multiplication to a microcomputer? In fact, use ROM to convert lowercase to uppercase, convert ASCII values to numbers, and any other conversions or simple calculations that usually require some addition and/or branching. You need a microcomputer with an address and data bus, and you can add many very cool and very fast functions through PROM/ROM.
I once acquired a precision absolute pressure sensor with a serial 16-bit output and 14-bit binary value. I built a circuit with a 16-bit shift register used to solve the 64KB eprom that I programmed with a 4-bit bcd value of atmospheric pressure. Then, a 2-bit counter drives the A0 and A1 lines to read the value to 4 bcd to 7-segment decoders to display the LED. This project makes me very happy.
Well done, a simple and elegant solution without a processor
need. Even talking to graduates 20 years ago, they had great difficulties in thinking
Proposed a discrete logic solution, because today’s uni focuses on swollen development kits
All expenses are concentrated on the latest frontier micros. It even
In the engineering field, it’s harder to impress i7 embedded operation these days
WIn 10 does not require simple gears to complete a simple safe industrial interface
Tasks with linear/rotational positioning – especially the many there etc...
I used to be the engineering manager of Pretron Electronics around 1985, we used the cheapest
Simple optical quadrature encoder, we made it with acrylic disc and photos
The sensor is used for bending after bending and for positioning the metal plate before bending.
Conventional readings use complex discrete logic and a proprietary LED interface. native
co proposed a simple low-cost design with a front end 74C86 and 2 resistors / 2 capacitors
Delay the edges of the quadrature feed to produce a combined 4-bit parallel signal
Value is fed into MC68705 CPU with smaller TTL, as long as
Changed the 4-bit mode so that the CPU multiplexing of the LED will not be interrupted unless
The location has changed, but even large changes in location can adapt
So fast, almost no flicker can be seen-all of this is applicable to metal bending positions with a resolution of 0.1mm.
The format used for display decoding is almost the same as the recompression format you described
But because the CPU has a large number of parallel output lines, it can decode segments into an array...
We have also performed brushless motor control, and theoretically you can use the same method to find
(Large) The PWM value of the motor in the segment table, the table gets the address from the increment
Reset the current position and set point, that is, the cheapest and simplest setting does not require PID.
The curve of the previously determined/checked memory value can be fixed in the rom as
Specific motor characteristics in a narrow dynamic range use environment or in ram (from
rom backup init) of course means to modify the table to deal with mechanical changes
For example, spring constant, load and power fluctuation beyond the stable range, etc.
Minimize CPU overhead and provide a system that does not depend on the inherent stability of the CPU
Calculations other than subtraction. In this way, the CPU can also
Content such as reporting statistics can be used for bending, recording, etc.
Although elegant, we have never produced it-the technical director prefers
Expensive but lightweight "bought one", that is, one that we can not use and sell
Advanced options: /Nuff talks about lost opportunities.
Today, many of these variants have been used and the patent has expired: shrug:
Among some younger graduates, I have to agree with you. The trend is to use FPGAs when few gates are available. It seems that there is indeed a lack of understanding of the analog/power circuit.
Eugene indeed :-)
In 1979, I was a tutor at WAIT (now Curtin Uni Bentley, Western Australia)
It is required to design the HP-1000 bus to the HPIB/Serial interface to drive larger A0 size flat panels
The plotter and came from a construction company that has several 19-inch HP-1000 cabinets with tape
Drive and removable disk up to 10MByte. They ran out of local design companies
Want to use the CP/M Northstar computer to complete this work, and hope to have two companies in the United States
Provide a $5000 interface, a simple plug-in card *should* handle it. He chose me
Have a little patience to deal with the weird ball convergence method;-)
We finally designed a plug-in card, which contains about 11 discrete LS chips and a UART.
Winding board-no need for external $ 3000 CP/M North star and its 12MByte 8" floppy disk, and
I also got paid, Ian got praise from his department, and at the same time I wrote Xcom (there is a number
8 x 8 polling at 4MHz for 8080/Z80 is fine for 19200 baud on many (~8) devices)
Perform a comms-like telnet session on many Northstar/Amiga desktops-only a "hub" is required
For switchable RS232 devices, at that time, this does not mean that there are so many handshake lines
"By the way", so the h / shake line is pinched by the loopback, so they are okay *grie*
What troubles me for another company is their reliance on the latest populist technology.
The source is unknown, the development path is not clear-all I did was analyze and simplify
Link to classic code snippets with the help of a few hours of truth tables
State machine architecture. This is all in the entire contemporary uni textbook
This place hasn’t been read yet, and competitors don’t seem to have read it-as Melanz often says-let's go ;-)
That was decades ago, now I am engaged in day trading, but it is still going to end
Then transfer the strange design from electronics to the field of biochemistry-speculation...
This is pretty much what I did to #DYPLED :-D
In fact, Flash today is the best, cheapest, and most flexible solution.
Very good work, very interesting. This is an actual demonstration, but it is impractical according to the usual meaning of practice. Thank you for sharing with others. Thank you.
This is very smart and comprehensive. I use address input for clock mining, and I bet that this can avoid glitch problems. Here, the glitch problem can be solved by adding a capacitor to the data line. For example, setting the data output with a low clock, and then copying those outputs with a high clock, one data output may change, indicating that the data is valid, this will be the clock of the next device...maybe the value is not low/high-active, but edge Sampling, or maybe one second/second of the same ROM and two-phase clock may be more stable. Let me think!
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