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Measuring Capacitor Self-inductance and ESR - In Compliance Magazine

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The parasitic parameters of the capacitor, namely equivalent series resistance (ESR) and inductance, will affect the way the capacitor works in the circuit. Some applications are very sensitive to these parameters. For example, bypass capacitors used between power and ground in digital circuits must be able to quickly provide current to nearby active devices. If the inductance is too large, this operation cannot be performed. Similarly, the transient response of a capacitor used to transfer current pulses due to electrostatic discharge is very important to the capacitor's ability to do its job.

So how to measure the parasitic parameters of the capacitor? Of course you can connect the capacitor to the network analyzer and get good characteristics. However, this instrument can be very expensive. When needed, there may not even be a cheaper capacitance measuring instrument. Both tools may not provide information in an easy-to-use form. If you have a pulse generator (preferably with an output impedance of 50 ohms) and an oscilloscope, you can easily measure the transient response of the capacitor. Based on this data, the ESR and inductance of the capacitor can be determined.

First, construct the simple network shown in Figure 1 at the end of a 50-ohm coaxial cable fed by a 50-ohm pulse generator. A 50 ohm resistor is used in Figure 1 to terminate the coaxial cable during the rising edge and provide a total source impedance of 100 ohms. The resistor shown is a 51 ohm 1/2 watt carbon resistor, one of the leads is trimmed, so the resistor is seated with the trimmed lead fully inserted into the BNC connector. It may be necessary to put a little solder bump on the resistor leads to make it stay firmly in the BNC connector. The capacitor to be tested is connected between one end of the resistor and the housing of the BNC connector. The oscilloscope is directly connected to both ends of the capacitor, and the shortest wire is used to connect the probe. It is recommended to use a probe with a resistance input impedance of 500 to 1000 ohms. Standard 10X HiZ probes usually have a rising edge effect, which will partially distort the waveform used for calculation.

For longer pulse lengths relative to the RC time constant, the open circuit voltage of the pulse source will increase exponentially. For the sake of discussion, we will look at the first few hundred millivolts of the 5-volt exponential rise. An example of this appears in Figure 2.

Figure 2 shows the beginning of the exponential voltage rise across the capacitor when the generator pulse begins. The vertical scale is approximately

200 millivolts. The horizontal time is a fraction of the 100 ohm RC time constant, and the capacitor is being measured. Since the capacitor voltage is still very small compared to the generator's 5 V open circuit output, it can be assumed that the current through the capacitor is constant and equal to the generator open circuit voltage divided by 100 ohms (50 mA in this case).

The rise time of the current will be the same as the generator voltage. If the rise is a slope with a constant slope and the capacitor has no inductance, the initial rise shown in Figure 2 will follow the dashed line, and then the slope will become the initial slope of the exponential rise determined by the following formula:

dv / dt = i / C = 50 mA / C (1)

Where C is the capacitance value under this low voltage and the rise time of the current << RC.

The offset between the baseline and the start of the exponential rise is the voltage produced by the current (in this case 50 mA) produced across the ESR of the capacitor. In this case, the ESR can be easily estimated by dividing the voltage offset (labeled ESR in Figure 2) by 50 mA.

The parasitic inductance in the capacitor will cause the spikes in the waveform shown in Figure 2 to exceed the dashed value along its length. If the current rise is actually a slope with a constant slope and very sharp corners (high di2/dt), the peak value will be a square wave value:

E = L * di / dt (2)

Where L is the parasitic inductance of the capacitor.

Like most generators I use, the current rise of the generator used for data in this article is not a ramp with very sharp corners and a constant slope. This characteristic of the generator combined with the detection effect results in a peak shape, such as the Ldi/dt spike shown in Figure 2. The inductance of the capacitor can be calculated using Equation 2. Generally, there is no need to calculate inductance or ESR. But just choose the capacitor with the lowest inductance and/or ESR from the available capacitors.

As shown in Figure 1, when the component is soldered to the BNC connector, the maximum operating frequency is 300 MHz. I estimate that the inductance of the loop formed by the capacitor and resistor is about 20 ohms at 300 MHz (estimated inductance at 10 nH). Relative to the 100 ohm resistor in the circuit, it is small enough to not have a big impact on the initial current. For this frequency range, a generator with a rise time of one to two nanoseconds will work.

If you need to use a faster rise time to check the capacitor, it is best to build the test setup on a small circuit board with a ground plane and controlled impedance. At this point, the parasitic capacitance of the 50 ohm resistor is also a problem to be considered. Fortunately, this accuracy is usually not required. Especially if you just compare the relative performance of several capacitors.

Figure 3 shows the initial rise of the generator. The black squares indicate the vertical voltage and horizontal time scale. The open circuit voltage is slightly higher than 4 volts, and the rise time is about 5 nanoseconds. The data in Figures 3 to 6 was taken on an analog oscilloscope several years ago. Figures 4 to 6 show data obtained from multiple leaded capacitors (as opposed to surface mount). Each capacitor has two traces. The lower trace is measured at the capacitor body, the leads enter it, and the upper trace contains the smallest amount of leads, which actually connects the capacitor to the printed circuit board. Unless someone wants to model the inductance of the connection between the capacitor and the target point on the printed circuit board, modern surface mount capacitors will not need the traces above.

Figure 4 shows the data for a 4 uF electrolytic capacitor. The ESR offset is about 50 mV, and the resulting ESR estimate is just over 1 ohm. Note that the 1/C part of the slope seems to oscillate. This could be the oscilloscope probe resonance or the resonance in the capacitor. The data was collected using a standard 10X HiZ probe, so the probe is questionable. I have seen that the internal resonance of the capacitor will produce obvious oscillations. If you plan to connect large capacitors in parallel with small capacitors, especially if they are made of different technologies, it is best to use this method to check the combined impulse response. Smaller capacitors may resonate with larger capacitors, causing unexpected results.

Figure 5 shows the result of a 1 uF capacitor with the same structure as the 4 uF capacitor tested in Figure 4. Note that the inductance is similar to a 4 uF capacitor, but the ESR is

A little lower. Since an analog oscilloscope is used, the waveform is repetitive, and the slight slope of the left half of the waveform is the end of the exponential drop starting from 5 V. If you use a single pulse on a digital oscilloscope, the slope will be on the left. The peak value of Ldi/dt will be zero.

Figure 6 shows the results of a 1 uF radial ceramic capacitor (square case). Pay attention to low inductance and undetectable ESR. Also note that the slope of the 1/C index rise is flatter, indicating a larger capacitance than the 1 uF capacitor in Figure 5. This may be because the electrolytic capacitor used in Figure 5 may have a lower capacitance near zero voltage than that of Figure 5. Under its operating voltage, ceramic capacitors have a more constant capacitance with voltage changes. The inductance corresponding to the lower trace is estimated to be 4.4 nH. Interestingly, in this test setup, a 0.1 uF ceramic capacitor of the same size as the 1 uF in Figure 6 shows a slightly higher inductance. I think this is because the smaller capacitor does not fill the package and the internal lead inductance causes this effect. In this case, using a 1 uF capacitor is better than using a 0.1 uF capacitor!

One of the advantages of this test is that the output waveform is the transient response of the capacitor. If the current rise time of the generator is similar to the time seen by the capacitor in its intended application, then the voltage generated across the capacitor in this test is directly related to the voltage occurring in the actual circuit.

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